![]() ![]() AMD plans to release the new platform when DDR5 memory stocks are stable and are no longer facing a shortage. After all, they are not due until the second half of this year. We’ll surely learn more about AMD’s upcoming CPU in the next following months to come. Meanwhile, the other CPU had 8 cores and 16 threads, similar to the current Ryzen 5800X. One CPU features 16 cores and 32 threads, and thus it was assumed to be the Ryzen 9 5950X’s successor. These could be the upcoming Ryzen 9 7950X and Ryzen 7 7800X. ![]() In addition to the CES 2022 announcement, two Ryzen 7000 SKUs were spotted. AMD Ryzen 9 7950X and Ryzen 7 7800X Coming Soon This was achieved when AMD demoed a Ryzen 7000 prototype CPU paired with a reference motherboard and DDR5-4800 32GB memory. However, there is a separate teaser from AMD, claiming that the upcoming Ryzen CPUs can boost up to 5GHz on all cores. I expect that we may learn more about the CPU themselves at Computex 2022, mid this year. On top of that you need DIMMs + Optane DIMMs so the savings aren't huge, like 10% just a few months ago for a lot of complexity.AMD CEO Lisa Su didn’t reveal any more details. Compared to typical DDR, the former offers them. RDDR and LRDDR are types of memory used for servers. In VMware you are relegated to Cascade Lake only with P100 DIMMs on 6.7 U3 EP14 or 7.0 P01 or later. AMD's current Epyc CPUs only support DDR4 RAM, and we already know Zen 4 will work with DDR5. However, there are a lot of restrictions on that especially if you are running your DB on VMware as most companies will be doing. For example, SAP HANA 2 SPS3 (came out in 2018) supports Optane in App Direct mode and NOT Memory mode. Not to mention that if this is a production environment your software needs to be able to support Optane. Intel can try pushing next gen Optane DIMMs to "fix" the issue compared to AMD, but Optane DIMMs while cheaper that RAM aren't that much cheaper for the added complexity. Being at an absolute RAM capacity disadvantage really hurts when it comes to servers. At 1 DIMM per channel with 128GB DIMMs you get 1TB RAM/socket in 8 channel vs 1.5TB RAM/socket in 12 channel. ![]() My guess is the 128GB DDR5, maybe the 256GB, will be the go to for the next gen servers. You get good capacity and they are relatively cheap. Right now the most popular RDIMMs are 64GB DIMMs. While that will help to alleviate main RAM bandwidth constraints (much like AMDs vCache), Intel will still be at a disadvantage when it comes to RAM capacity like it was with Xeon Scaleable until Ice Lake. Intel is already working on support for Optane via that path, which would reduce the complexity and timing constraints of their DDR5 memory accesses.Īnother interesting configuration would be to use only the HBM stacks as local DDR, and to replace all the external memory pins with more PCIE5.I believe that the HBM Intel has added is acting like an L4 cache and not viewed as RAM by the OS/Hypervisor. It will also enable memory package power and physical formats different from DIMMs to exist in those pools. One interesting option with the pcie5/cxl is that large external memory pools will become available via memory pool controllers that will sit on that bus. This chart also has information how to install one, two, or four memory DDR5. so, effectively adding 32 memory channels to the 8 existing ddr5 channels. on AMDs Zen 4 AM5 platform and feature PCIe 5. I believe those can be configured as 8x128wide memory channels per stack. JayNor said:Intel added 4 stacks of HBM to the version of SPR used in HPC. That said there were rumors back in March that said it would be 12 channels. This report means that the leak was accurate which is always nice. I could easily go to 50% CPU over provision and not have any performance issues (right now it is showing 14% CPU usage). For example, I have some server hosts that have 128 vCPUs but have allocated 158 vCPUs, or a 23% over provisioning. However, when you over provision RAM you will very quickly run into performance issues. While having a lot of CPU helps, the shared nature of virtualization makes it pretty easy to over provision CPU. I have said on forums that I feel Sapphire Rapids will be behind the curve since it is only going to have 8 channel DDR5. I think the bigger thing is AMD wanted more RAM density. Staying with 8 channel would have given a 62.5% increase in RAM bandwidth per socket. Zen 4 Madness: AMD EPYC Genoa With 96 Cores, 12-Channel DDR5 Memory, and AVX-512 | Tom's Hardware ()With DDR5 AMD could have gotten away with fewer channels due to the increased bandwidth. The current mockups of the AMD Genoa CPU have it with 12 CCDs, so a tweaked chip. Milan already has 64 cores and if Genoa is to top out at 96 cores, it's going to need 12 channels to keep an 8:1 ratio.Īlso since this was leaked in August, it's not really new news. A new Zen 4-powered EPYC or Threadripper CPU with 128C/256T will also support up to 12-channel DDR5-5200 memory. Alvar Miles Udell said:Not exactly a surprise. ![]()
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